DIY ASIC Repair Guide: Chip Diagnostics & Hashboard Replacement

If your S19 Pro stopped hitting its rated 110 TH/s and the web UI is showing 0 ASICs or a broken domain chain instead of all 76 chips, it’s time to toss the hashboard on the diagnostic bench. 90% of the time, you're dealing with a cracked solder joint/silicon delamination from thermal cycling, a blown LDO regulator, or a micro-fracture in the PCB trace.

S19 Pro Hashboard Architecture: Voltage Domains and Signal Flow

The Antminer S19 Pro hashboard packs 76 BM1398 ASIC chips split across 19 series-connected voltage domains (4 chips per domain). The total rail voltage (~12.5–15V depending on stock or custom firmware) drops sequentially across these domains. That leaves about 0.7–0.8V per domain, while the individual ASIC core runs on a VCORE voltage of roughly 0.32–0.42V.

Signals propagate serially down the chain from Chip 1 (right next to the control board ribbon connector) all the way to Chip 76:

• CLK (25 MHz): The main clock signal. If CLK drops out at Chip 30, every chip downstream goes completely dark.
• CO (Command Output): Incoming command data line originating from the control board.
• RI (Return Input): Return response signal heading back to the control board. Runs in reverse—from Chip 76 back to Chip 1.
• RST (Reset): Master reset line. Active low logic here pulls the chip into a hard reset state.
• BO (Busy Output): Busy signal line indicating bus traffic status.

Step-by-Step Diagnostics: From Kernel Logs to Diode Testing

Fire up the Kernel Log via the miner’s web GUI or custom firmware (VNish, HiveOS). Let's pinpoint exactly where the signal chain drops out.

Key log signatures to look for:

• Chain 1: found 0 asics — Zero response on the RI return path. Check Chip 1 immediately, inspect its LDO power rail, or check for loose pins/corrosion on the control board ribbon cable connector.
• Chain 2: only 42 asics found — The signal is dying around Chip 42 or 43. Skip straight to that domain on the board.
• Read temp sensor failed — The TMP75 temperature sensor threw a fault. S19 Pro boards scatter these across multiple domains. A dead sensor triggers a safety shutdown, preventing the board from hashing.

Probing Test Points (Diode Mode Check)

Hook the board up to a bench test fixture or repair PSU (keep the high-current main bus powered down!) and set your digital multimeter to diode mode (red lead grounded to GND).

[Chip 42] ---> (CO / CLK / RST) ---> [Chip 43]
[Chip 42] <--- (RI / BO)        <--- [Chip 43]

Ground-referenced diode readings on signal test points should be relatively uniform across the entire board:

• CLK, CO, RI, RST: Typically read around 0.450V–0.600V (450–600 in diode mode).

If the CLK test point on Chip 43 rings out at 0 ohms (dead short) or reads OL/infinity (open circuit), that ASIC is dead and needs to be swapped.

LDO Power Supplies

Every domain relies on local LDO voltage regulators to supply auxiliary power for the chip's internal logic:

• VDD 1.8V: Powers the signal line I/O buffers.
• VDD 0.8V: Powers the internal logic core.

If a chip gets its 1.8V supply but lacks 0.8V rail voltage, it can't forward the CLK signal downstream, forcing the board to report a broken chain at that exact chip.

Why You Need an Oscilloscope (And How to Scope the Board)

A multimeter only gives you average DC voltage levels. It's totally blind when static voltages look fine but the underlying AC waveform is distorted, noisy, or clipping in amplitude. A multimeter can easily lie to you—an scope won't.

Grab a scope with at least 100 MHz bandwidth and set your probe to 10X attenuation.

Checking CLK (25 MHz Clock Line):

Probe the CLK test point directly. You should see a clean sine or clipped square wave with an amplitude around 1.8V peak-to-peak. If you see a squashed sawtooth wave sitting at ~0.4V, the internal output buffer on that ASIC is fried and can't drive the line.

Checking CO/RI Signal Packets:

During startup initialization, the control board fires off fast data bursts. On the scope, these appear as rapid high-frequency pulse trains. If you probe Chip 43's input and catch data packets, but see dead silence on its output, the chip is dead or stuck with its RST line pulled low.

Power Rail Ripple Analysis:

Switch your scope input coupling to AC mode and probe the SMD decoupling caps directly under the belly of the ASIC. Noise spikes or ripple exceeding 30–40 mV AC indicate that the ceramic capacitors around the chip have degraded or dried up from excessive heat.

Test Point Reference Sheet (Antminer S19 Pro / BM1398)

Rework & Soldering: Swapping out the BM1398

The aluminum substrate on S19 Pro hashboards acts like a giant heatsink. Trying to blast an ASIC off with just a hot air station from above will instantly scorch the chip substrate and lift pads right off the PCB.

Tools required:

• Preheater / Hot plate (set thermal profile to 160–180°C).
• Hot air rework station (sized nozzle matching chip dimensions).
• No-clean BGA tacky flux (NC-559, Martin, or RMA-223).
• 0.35 mm leaded solder balls or Sn63/Pb37 solder paste (leaded solder melts at 183°C, making life ten times easier compared to factory lead-free solder).

Step-by-step rework workflow:

1. Place the hashboard onto the preheater and slowly ramp the temperature up to 150–160°C. If you rush the preheat, thermal expansion differentials between the FR4 layers and the aluminum substrate will warp the board like a banana.
2. Apply a small dab of tacky flux around the chip perimeter.
3. Bring in top hot air (air nozzle set to ~340–360°C with medium airflow). Move in steady circular motions over the chip.
4. Gently nudge the chip with tweezers. Once it floats on liquid solder balls, lift it straight up vertically.
5. Clean up residual solder on the PCB pads using copper desoldering braid soaked in rosin flux, then clean the area thoroughly with Isopropyl Alcohol (IPA).
6. Reball the new ASIC using a stencil and leaded solder paste/balls.
7. Align the chip pin 1 orientation mark with the PCB silkscreen notch and position it accurately.
8. Heat from below with the preheater while applying top air until reflow occurs. The chip will surface-tension snap right into place automatically once the solder liquifies.

Python Kernel Log Parser for Instant Diagnostics

To skip digging through massive log files manually, use this quick script. Feed it a miner log, and it’ll automatically flag the exact chip line fault and tell you where to throw your multimeter probes.

#!/usr/bin/env python3
import re
import sys

EXPECTED_ASICS = 76

def parse_asic_log(filepath):
    chain_pattern = re.compile(
        r"Chain\[(\d+)\]:\s*found\s*(\d+)\s*asics",
        re.IGNORECASE
    )
    sensor_pattern = re.compile(
        r"sensor[\[\s]*(\d+)[\]\s]*.*temp.*error",
        re.IGNORECASE
    )
    
    issues_found = False
    problem_chains = []
    reported_sensors = set()
    
    print(f"[*] Parsing log file: {filepath}\n")
    
    try:
        with open(filepath, "r", errors="ignore") as f:
            for num, line in enumerate(f, 1):
                # Check ASIC counts per chain
                c_match = chain_pattern.search(line)
                if c_match:
                    chain_id = int(c_match.group(1))
                    found = int(c_match.group(2))
                    if found < EXPECTED_ASICS:
                        issues_found = True
                        problem_chains.append(
                            (chain_id, found, EXPECTED_ASICS)
                        )
                        print(
                            f"[!] Chain {chain_id}: found "
                            f"{found}/{EXPECTED_ASICS} ASICs."
                        )
                        if found == 0:
                            print(
                                "    -> First ASIC in chain not detected."
                            )
                            print(
                                "    -> Inspect board power rail, RI, "
                                "RST, BOOT, and CLK signals."
                            )
                        else:
                            print(
                                f"    -> Probe output signals (CLK/CO) "
                                f"on ASIC #{found}"
                            )
                            print(
                                f"    -> Probe input signals (RI) and "
                                f"LDO rail on ASIC #{found + 1}"
                            )
                        print()

                # Check temperature sensor faults
                s_match = sensor_pattern.search(line)
                if s_match:
                    sensor_id = int(s_match.group(1))
                    if sensor_id not in reported_sensors:
                        issues_found = True
                        reported_sensors.add(sensor_id)
                        print(
                            f"[!] Thermal sensor fault on "
                            f"sensor #{sensor_id} (Line {num})."
                        )
                        print(
                            "    -> Check TMP75 IC, LDO power rail, "
                            "and I2C bus lines."
                        )
                        print()

        # Final Diagnostic Summary
        print("=" * 60)
        print("DIAGNOSTIC SUMMARY")
        print("=" * 60)
        if not issues_found:
            print("[+] No known error patterns detected in log.")
            return False

        if problem_chains:
            print("\nFaulty Chains:")
            for chain_id, found, expected in problem_chains:
                print(
                    f"  - Chain {chain_id}: "
                    f"{found}/{expected} ASICs detected"
                )

        if reported_sensors:
            print("\nThermal Sensor Faults:")
            for sensor_id in sorted(reported_sensors):
                print(f"  - Sensor #{sensor_id}")
        print()
        return True

    except FileNotFoundError:
        print(f"[-] File not found: {filepath}")
        return True
    except Exception as e:
        print(f"[-] Error processing file: {e}")
        return True

if __name__ == "__main__":
    if len(sys.argv) < 2:
        print(
            f"Usage: {sys.argv[0]} <path_to_log.txt> "
            f"[expected_asics]"
        )
        sys.exit(1)

    if len(sys.argv) >= 3:
        try:
            EXPECTED_ASICS = int(sys.argv[2])
        except ValueError:
            print("[-] expected_asics must be an integer.")
            sys.exit(1)

    has_issues = parse_asic_log(sys.argv[1])
    sys.exit(1 if has_issues else 0)

Usage examples:

python diag.py kernel.log

For non-standard boards with different chip counts:

• python diag.py kernel.log 63
• python diag.py kernel.log 72
• python diag.py kernel.log 80

Pre-Assembly QA Checklist (Before Mounting in Chassis)

• VCORE Bus Resistance Check: Verify ground-referenced resistance across the main VCORE bus is not showing a dead short to ground (0 ohms).
• LDO Voltage Check under Light Load: Power up using a bench tester and confirm 1.8V and 0.8V rails are present on the replaced ASIC.
• Clock Signal Propagation: Verify with your scope that the 25 MHz clock signal cleanly passes through the newly soldered chip to downstream stages.
• Full Load Burn-In Test: Reassemble the miner into its casing with stock fan ducting, burn-in the board on stock firmware for 2–3 hours, and monitor hardware error rates (HW errors) on the repaired domain.